PORTALE DELLA DIDATTICA

Ricerca CERCA
  KEYWORD

Keyword: SOFTWARE ACCELERATION

Accelerazione di applicazioni software su FPGA usando sintesi ad alto livello  LAVAGNO LUCIANO  LAZARESCU MIHAI TEODOR  microelettronica
Esplorazione e mapping su architetture eterogenee ultra-parallele: Un'analisi delle prestazioni e l'esplorazione di un algoritmo di NAS per reti neurali profonde  JAHIER PAGLIARI DANIELE  DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA  ELECTRONIC DESIGN AUTOMATION - EDA  GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
Exploration of uTVM and Extension to Ultra-low-power Multi-core Platforms Based on RISC-V  JAHIER PAGLIARI DANIELE  DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA  ELECTRONIC DESIGN AUTOMATION - EDA  GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
azienda TESI AZIENDA Extending the Open-source TVM Compiler to Deploy Deep Neural Networks on the GreenWaves' GAP9 Platform  JAHIER PAGLIARI DANIELE  DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA  ELECTRONIC DESIGN AUTOMATION - EDA  GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
esteroTESI ALL'ESTERO Integrating design space exploration in modern compilation toolchains  JAHIER PAGLIARI DANIELE  DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA  ELECTRONIC DESIGN AUTOMATION - EDA  GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
Optimization of Deep Neural Networks through Innovative Neural Architecture Search Algorithms  JAHIER PAGLIARI DANIELE  DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA  ELECTRONIC DESIGN AUTOMATION - EDA  GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
Optimization of Transformer Deep Neural Networks on Multi-Core MCUs  JAHIER PAGLIARI DANIELE  DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA  ELECTRONIC DESIGN AUTOMATION - EDA  GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA




© Politecnico di Torino
Corso Duca degli Abruzzi, 24 - 10129 Torino, ITALY
Contatti